Neuromorphic circuits – biologically-inspired simulations of a synapse in hardware
The basic principle of neuromorphic circuits is to mimic the functionality of the human brain by means of artificial synapses for use in technical products and production processes. This is supposed to facilitate that computer chips can solve problems like pattern recognition, associations, or forecasts with much less effort than previously.
Previously, such tasks have been solved through the matching of known cases from a database with predefined similarity. This implies that memory and processor are separate entities and therefore lack the ability for spontaneous abstraction, which could create contexts and therefore new knowledge. Neuromorphic chips however combine artificial neurons with artificial synapses, which means that they combine memory and processor and are capable of “learning”. This is realized with special hardware materials, which change their resistance depending on the intensity of current that flows through them. The last resistance state is maintained when the power is switched off – afterwards the special hardware material “remembers” and maintains this resistance until it is reduced by a reversed current. This leads to a constant adaptation of the circuits to commonly asked duties, the self-organization of data, thus allowing learning new functions and relationships. Software-based solutions of artificial neuronal networks operate similarly, but are reaching their limits, since the replica of a neuron in hardware operates faster than the emulation of a neuron by software.
The new material BFO shows the desired functionality of a multilevel non-volatile switch and can therefore be used as an artificial synapse in neuromorphic circuits. The non-volatility of the synaptic weight is a measure for the ability of the artificial synapse to learn. Artificial synapses based on conventional hardware materials alter their synaptic weight after 60 – 80 pre-post write pulses, whereas the BFO-based synapses remain convienently constant and can be calibrated by the application of an individual pre-post write pulse. This enables reduction of the learning window and a dramatic reduction in energy consumption for the learning of BFO-based artificial synapses.
Neuromorphic chips are not currently available on the market, but high research and foresight efforts are made.